1. Field
Exemplary embodiments of the present invention relate to a semiconductor device, and more particularly, to a semiconductor device including an NMOS transistor and a PMOS transistor, such as an SRAM (Static Random Access Memory) cell.
2. Description of the Related Art
Semiconductor memory cells may be divided in nonvolatile memory cells and volatile memory cells. The nonvolatile memory cell has a characteristic of maintaining data stored therein even though power supply is cut off, and may include a flash memory cell a phase change memory cell, a magnetic memory cell and the like. On the other hand, the volatile memory cell has a characteristic of losing data stored therein when power supply is cut off, and may include a DRAM (Dynamic Random Access Memory) cell, an SRAM cell and the like.
In particular, the SRAM cell has higher operating speed than the DRAM cell, and does not require a refresh operation. However, the SRAM cell occupies a larger area than the DRAM cells. For this reason much research has been conducted on a method capable of reducing the size of the SRAM cell while securing the performance of the SRAM cell.